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CY7C1356C-250AXC IC SRAM 9MBIT PAR 100TQFP Infineon Technologies

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CY7C1356C-250AXC IC SRAM 9MBIT PAR 100TQFP Infineon Technologies

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Brand Name :Infineon Technologies
Model Number :CY7C1356C-250AXC
MOQ :1
Price :Based on current price
Payment Terms :T/T
Supply Ability :In stock
Delivery Time :3-5 work days
Packaging Details :anti-static bag & cardboard box
Memory Type :Volatile
Memory Format :SRAM
Technology :SRAM - Synchronous, SDR
Memory Size :9Mbit
Memory Organization :512K x 18
Memory Interface :Parallel
Clock Frequency :250 MHz
Write Cycle Time - Word, Page :-
Access Time :2.8 ns
Voltage - Supply :3.135V ~ 3.6V
Operating Temperature :0°C ~ 70°C (TA)
Mounting Type :Surface Mount
Package / Case :100-LQFP
Supplier Device Package :100-TQFP (14x20)
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Product Details

Functional Description

The CY7C1354A and CY7C1356A SRAMs are designed to eliminate dead cycles when transitioning from Read to Write or vice versa. These SRAMs are optimized for 100% bus utilization and achieve Zero Bus Latency™ (ZBL™)/No Bus Latency™ (NoBL™). They integrate 262,144 × 36 and 524,288 × 18 SRAM cells, respectively, with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. These employ high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors.

Features

• Zero Bus Latency™, no dead cycles between Write and Read cycles
• Fast clock speed: 200, 166, 133, 100 MHz
• Fast access time: 3.2, 3.6, 4.2, 5.0 ns
• Internally synchronized registered outputs eliminate the need to control OE
• Single 3.3V –5% and +5% power supply VCC
• Separate VCCQ for 3.3V or 2.5V I/O
• Single WEN (Read/Write) control pin
• Positive clock-edge triggered, address, data, and control signal registers for fully pipelined applications
• Interleaved or linear four-word burst capability
• Individual byte Write (BWa–BWd) control (may be tied LOW)
• CEN pin to enable clock and suspend operations
• Three chip enables for simple depth expansion
• Automatic power-down feature available using ZZ mode or CE select
• JTAG boundary scan
• Low-profile 119-bump, 14-mm × 22-mm BGA (Ball Grid Array), and 100-pin TQFP packages

Specifications

Attribute Attribute Value
Manufacturer Cypress Semiconductor
Product Category Memory ICs
Series NoBL™
Type Synchronous
Packaging Tray Alternate Packaging
Unit-Weight 0.023175 oz
Mounting-Style SMD/SMT
Package-Case 100-LQFP
Operating-Temperature 0°C ~ 70°C (TA)
Interface Parallel
Voltage-Supply 3.135 V ~ 3.6 V
Supplier-Device-Package 100-TQFP (14x20)
Memory Capacity 9M (512K x 18)
Memory-Type SRAM - Synchronous
Speed 250MHz
Data-Rate SDR
Access-Time 2.8 ns
Format-Memory RAM
Maximum Operating Temperature + 70 C
Operating temperature range 0 C
Interface-Type Parallel
Organization 512 k x 18
Supply-Current-Max 250 mA
Supply-Voltage-Max 3.6 V
Supply-Voltage-Min 3.135 V
Package-Case TQFP-100
Maximum-Clock-Frequency 250 MHz
Functional compatible componentForm,Package,Functional compatible component
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Descriptions

SRAM - Synchronous Memory IC 9Mb (512K x 18) Parallel 250MHz 2.8ns 100-TQFP (14x20)
SRAM 9Mb 250Mhz 512K x 18 Pipelined SRAM
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